BIPOLAR ANALOG + DIGITAL INTEGRATED CIRCUIT
μ PB1007K
REFERENCE FREQUENCY 16.368 MHz, 2nd IF FREQUENCY 4.092 MHz
RF/IF FREQUENCY DOWN-CONVERTER +
PLL FREQUENCY SYNTHESIZER IC FOR GPS RECEIVER
DESCRIPTION
The μ PB1007K is a silicon monolithic integrated circuit for GPS receiver. This IC is designed as double conversion
RF block integrated Pre-Amplifier + RF/IF down-converter + PLL frequency synthesizer on 1 chip.
This IC is lower current than the μ PB1005K and packaged in a 36-pin QFN package.
This IC is manufactured using our 30 GHz f max UHS0 (Ultra High Speed Process) silicon bipolar process.
FEATURES
? Double conversion
? Integrated RF block
? Needless to input counter data
? VCO side division
? Reference division
? Supply voltage
? Low current consumption
? Gain adjustable externally
? On-chip pre-amplifier
? Power-save function
? High-density surface mountable
: f REFin = 16.368 MHz, f 1stIFin = 61.380 MHz, f 2ndIFin = 4.092 MHz
: Pre-Amplifier + RF/IF frequency down-converter + PLL frequency synthesizer
: fixed division internal prescaler
: ÷ 200 ( ÷ 25, ÷ 8 serial prescaler)
: ÷ 2
: V CC = 2.7 to 3.3 V
: I CC = 25.0 mA TYP. @ V CC = 3.0 V
: Gain control voltage pin (control voltage up vs. gain down)
: G P = 15.5 dB TYP. @ f = 1.57542 GHz
NF = 3.2 dB TYP. @ f = 1.57542 GHz
: Power-save dark current I CC (PD) = 5 μ A MAX.
: 36-pin plastic QFN
APPLICATIONS
? Consumer use GPS receiver of reference frequency 16.368 MHz, 2nd IF frequency 4.092 MHz (for general use)
ORDERING INFORMATION
Part Number
μ PB1007K-E1-A
Package
36-pin plastic QFN
Supplying Form
? 12 mm wide embossed taping
? Pin 1 indicates pull-out direction of tape
? Qty 2.5 kpcs/reel
Remark To order evaluation samples, contact your nearby sales office.
Part number for sample order: μ PB1007K-A
Caution Electro-static sensitive devices
Document No. PU10014EJ02V0DS (2nd edition)
Date Published February 2002 CP(K)
The mark
shows major revised points.
? NEC Compound Semiconductor Devices 2001,
2002
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